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1 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers the sp3282eb device is an rs-232 transceiver solution intended for portable or hand-held applications such as notebook and palmtop computers, pdas, cell phones and their data cables and cradles. the sp3282eb is compatible with low voltage logic down to 1.8v using a logic select pin (vl) which conditions the logic inputs and outputs to be compatible with system logic. the sp3282eb uses an internal high-efficiency, charge-pump power supply that requires only 0.1 f capacitors in 3.3v operation. this charge pump and sipex's driver architecture allow the sp3282eb device to deliver compliant rs-232 performance from a single +3.3v to +5.5vpower supply and additionally adhere to eia/tia-562 driver outputs levels down to a power supply voltage of 2.35v. the auto on-line feature allows the device to automatically "wake-up" during a shutdown state when an rs-232 cable is connected and a connected peripheral is turned on. otherwise, the device automatically shuts itself down drawing less than 1 a. features operates over entire li+ battery range interoperable with eia/tia-232-f and adheres to eia/tia-562 down to a +2.35v power supply auto on-line circuitry automatically wakes up from a 1 a shutdown minimum 250kbps data rate regulated charge pump yields stable rs-232 outputs regardless of v cc variations unique v l for low logic compatibility regardless of v cc enhanced esd specifications for all ttl and rs-232 i/o lines. +15kv human body model +15kv iec1000-4-2 air discharge +8kv iec1000-4-2 contact discharge enhanced battery life as the v cc drops below 3.1v description applicable u.s. patents - 5,306,954; and 6,378,026. cell phone data cables pdas, pda cradles hand held equipment peripherals applications device power rs-232 rs232 external auto on-line data no. of supplies drivers receivers components circuitry rate pins sp3282eb 2.35v to 5.5v 5 3 4 yes 250kbps 28 table 1 preliminary t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in r3in online c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t 1 out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out v l c1+ t 4 out t 5 out status sp3282eb now available in lead free packaging
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 2 parameter min. typ. max. units conditions supply current supply current, 1.0 10 a all rxin open, all txin at v l or gnd, auto on-line v cc =v l =+3.3v, t a =25 c online = gnd, shutdown = v l , supply current, shutdown 1.0 10 a all rxin open, all txin at v l or gnd v cc =v l =+3.3v, t a =25 c online = v l or gnd, shutdown = gnd supply current, 0.3 1.0 ma all txin at v l or gnd, online = v l , auto on-line disabled v cc =v l =+3.3v, t a =25 c shutdown = v l ,no load logic inputs and receiver outputs input logic threshold low txin, online, shutdown 0.8 v v l = +3.3v or +5.0v 0.6 v l = +2.5v 0.4 v l = +1.8v input logic threshold high txin, online, shutdown 2.4 v v l = +5.0v 2.0 v l = +3.3v 1.4 v l = +2.5v 0.9 v l = +1.8v transmitter input hysteresis 0.3 v input leakage current 0.01 1.0 a txin, online, shutdown, t a = 25 c output leakage current 0.05 10 a rxout, receivers disabled output voltage low 0.4 v i out = +1.6ma, v l =2.5v, 3.3v, or 5.0v 0.4 i out = +0.8ma, v l =1.8v output voltage high v l - 0.6 v l - 0.1 v i out = -1.0ma, v l =2.5v, 3.3v, 5.0v v l - 0.6 v l - 0.1 i out = -0.5ma, v l =1.8v driver outputs v cc mode switch point 2.95 3.1 3.25 v txout= 5.0v to 3.7v (v cc is falling) v cc mode switch point 3.3 3.5 3.7 v txout= 3.7v to 5.0v (v cc is rising) v cc mode switch point 400 mv hysteresis absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc ......................................................-0.3v to +6.0v v+ (note 1).........................................-0.3v to +7.0v v- (note 1)..........................................+0.3v to -7.0v v+ + |v-| (note 1).............................................+13v i cc (dc v cc or gnd current)......................... +100ma input voltages v l. .......................................................-0.3v to +6.0v electrical characteristics v cc = +2.35 to +5.5v, v l =+1.8 to +5.5v, c1 - c4 = 0.22 f. t a =t min to t max , unless otherwise noted. typical values are at v cc =v l =+3.3v, and t a = +25 c.) txin, online, shutdown, .............0.3v to +6.0v rxin.................................................................. +25v output voltages txout............................................................ + 13.2v rxout, status.......................-0.3v to (v l + 0.3v) short-circuit duration txout.....................................................continuous storage temperature......................-65 c to +150 c power dissipation per package 28-pin ssop (derate 11.2mw/ o c above +70 o c)............900mw 28-pin tssop (derate 13.2mw/ o c above +70 o c).........1100mw
3 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation parameter min. typ. max. units conditions output voltage swing all driver outputs loaded with 3k ? to gnd, t a =25 c 5.0 5.4 v v cc =3.25v to 5.5v, +/-3.7 v cc =2.35 to 2.95v, output resistance 300 ? v cc = v+ = v- = 0v, v txout = 2v output short-circuit current 35 60 ma v txout = gnd ouput leakage current +/-25 av txout =+/-12v, transmitter disabled, v cc =0v or 2.35v to 5.5v receiver inputs input voltage range -25 25 v input threshold low 0.3 0.8 v vl=1.8v, t a =25 c 0.6 1.2 vl=2.5v or 3.3v, t a =25 c 0.8 1.5 vl=5.0v, t a =25 c high 1.0 1.8 v vl=1.8v, t a =25 c 1.5 2.4 vl=2.5v or 3.3v, t a =25 c 1.8 2.4 vl=5.0v, t a =25 c input hysteresis 0.3 v input resistance 3 5 7 k ? t a =25 c auto on-line circuitry characteristics (online = gnd, shutdown = v cc ) status output voltage low 0.4 v i out = 1.6ma, v l =2.5v, 3.3v, 5.0v or i out = +0.8ma, v l =1.8v high v l - 0.6 v l -0.1 i out = -1.0ma, v l =2.5v, 3.3v, 5.0v or i out = -0.5ma, v l =1.8v receiver threshold to drivers 200 s enabled (t online ) receiver +/- threshold to status high (t stsh )20 s to status low (t stsl )20 s ac characteristics maximum data rate 250 kbps sp3282eb: r l = 3k ? , c l = 1000pf, one driver switching receiver propagation delay receiver input to output, c l = 150pf t phl 0.15 s t plh 0.15 receiver output enable time 200 ns normal operation receiver output disable time 200 ns normal operation time to exit shutdown 100 s|v txout |>3.7v, v cc =3.3v driver skew |t phl -tp lh | 100 ns measured at zero crossover receiver skew |t phl -t plh |5 0n s measured at zero crossover transition-region slew rate v cc = 3.3v, r l = 3k ? to 7k ? , t a = 25 c, measurements taken from -3.0v to +3.0v or +3.0v to -3.0v 30 v/ sc l = 150pf to 1000pf electrical characteristics v cc = +2.35 to +5.5v, v l =+1.8 to +5.5v, c1 - c4 = 0.22 f. t a =t min to t max , unless otherwise noted. typical values are at v cc =v l =+3.3v, and t a = +25 c.)
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 4 table 2. device pin description pin description name function pin no. c2+ positive terminal of the symmetrical charge-pump capacitor c2. 1 gnd ground. 2 c2- negative terminal of the symmetrical charge-pump capacitor c2. 3 v- regulated -4.0v or -5.5v output generated by the charge pump. 4 t 1 out rs-232 driver output. 5 t 2 out rs-232 driver output. 6 t 3 out rs-232 driver output. 7 r 1 in rs-232 receiver input. 8 r 2 in rs-232 receiver input. 9 t 4 out rs-232 driver output. 10 r 3 in rs-232 receiver input. 11 t 5 out rs-232 driver output. 12 online apply logic high to override auto on-line circuitry keeping drivers active (shutdown must also be logic high, refer to table 2). 13 shutdown apply logic low to shut down drivers and charge pump. this overrides all auto on-line circuitry and online (refer to table 2). 14 status ttl/cmos output indicating if a rs-232 signal is present on any rx input. 15 v l logic level supply voltage selection 16 t 5 in ttl/cmos driver input. 17 r 3 out ttl/cmos receiver output. 18 t 4 in ttl/cmos driver input. 19 r 2 out ttl/cmos receiver output. 20 r 1 out ttl/cmos receiver output. 21 t 3 in ttl/cmos driver input. 22 t 2 in ttl/cmos driver input. 23 t 1 in ttl/cmos driver input. 24 c1- negative terminal of the symmetrical charge-pump capacitor c1. 25 v cc +2.35v to +5.5v supply voltage. 26 v+ regulated +4.0v or +5.5v output generated by the charge pump. 27 c1+ positive terminal of the symmetrical charge-pump capacitor c1 28
5 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation figure 2. sp3282eb pinout configuration typical perfomance characteristics unless otherwise noted, the following perfomance characteristics apply for v cc = +4.2v, 250kbps data rate, all drivers loaded with 3k ? , 0.22 f charge pump capacitors, and t amb = +25 c. figure 3. sp3282eb application diagram figure 4. circuit for the connectivity of the sp3282eb with a db-9 connector t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in r3in online c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t 1 out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out v l c1+ t 4 out t 5 out status sp3282eb sp3282eb 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f logic level select 13 14 16 v cc v cc 2 online shutdown v l 5k ? 5k ? 5k ? 21 20 18 8 9 11 rs-232 inputs ttl/cmos outputs r 1 out r 1 in r 2 in r 3 in r 2 out r 3 out 24 23 22 5 6 7 rs-232 outputs ttl/cmos inputs t 1 in t 2 out t 2 in t 3 in t 3 out t 1 out 19 17 10 12 t 4 out t 4 in t 5 in t 5 out sp3282eb 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f logic level select 13 14 16 v cc v cc 2 online shutdown v l 5k ? 5k ? 5k ? 21 20 18 8 9 11 rs-232 inputs ttl/cmos outputs r 1 out r 1 in r 2 in r 3 in r 2 out r 3 out 24 23 22 5 6 7 rs-232 outputs ttl/cmos inputs t 1 in t 2 out t 2 in t 3 in t 3 out t 1 out 19 17 10 12 t 4 out t 4 in t 5 in t 5 out
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 6 description the sp3282eb device meets the eia/tia-232 and itu-t v.28/v.24 communication protocols and can be implemented in battery-powered, por- table, or hand-held applications such as notebook or palmtop computers. the sp3282eb device features sipex's proprietary and patented (u.s. #5,306,954) on-board charge pump circuitry that generates 5.5v rs-232 voltage levels from a single +3.3v to +5.5v power supply. the sp3282eb will adhere to eia/tia-562 voltage levels with v cc as low as 2.35v. the sp3282eb device is an ideal choice for power sensitive designs. the sp3282eb device features auto on-line circuitry which reduces the power supply drain to a 1 a supply current. in many portable or hand-held applications, an rs- 232 cable can be disconnected or a connected peripheral can be turned off. under these condi- tions, the internal charge pump and the drivers will be shut down. otherwise, the system automati- cally comes online. this feature allows design engineers to address power saving concerns with- out major design changes. theory of operation the sp3282eb device is made up of four basic circuit blocks: 1. drivers, 2. receivers, 3. the sipex proprietary charge pump, and 4. auto on-line circuitry. drivers the drivers are inverting level transmitters that , when v cc is between +3.3v and +5.5v, convert ttl or cmos logic levels to 5.0v eia/tia-232 levels with an inverted sense relative to the input logic levels . typically, the rs-232 output voltage swing is +5.4v with no load and +5v minimum fully loaded. the driver outputs are protected against infinite short-circuits to ground without degradation in reliability. these drivers comply with the eia-tia-232f and all previous rs-232 versions. the driver outputs will adhere to eia/ tia-562 when v cc is as low as 2.35v. the sp3282eb drivers can guarantee a data rate of 250 kbps fully loaded with 3k ? in parallel with 1000pf, ensuring compatibility with pc-to-pc communication software. all unused driver inputs must be connected to v l or gnd. figure 6 shows a loopback test circuit used to test the sp3282eb rs-232 drivers. figure 7 shows the test results of the loopback circuit with all five drivers active at 120kbps with typical rs-232 loads in parallel with 1000pf capacitors. figure 8 shows the test results where one driver was active at 250kbps and all five drivers loaded with an rs- 232 receiver in parallel with a 1000pf capacitor. a solid rs-232 data transmission rate of 120kbps provides compatibility with many designs in per- sonal computer peripherals and lan applications. receivers the receivers convert 5.0v eia/tia-232 levels to ttl or cmos logic output levels. receivers are not active when in shutdown. if there is no activity present at the receivers for a period longer than 100 s during auto on- line mode or when shutdown is enabled, the device goes into a standby mode where the circuit draws 1 a. the truth table logic of the driver and receiver outputs can be found in table 3. figure 5. interface circuitry being controlled by microprocessor supervisory circuit sp3282eb 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f 13 14 15 v cc 2 online shutdown status p supervisor ic v cc v in reset 5k ? 5k ? 5k ? 24 23 22 21 20 18 5 6 7 8 9 11 rs-232 outputs rs-232 inputs t 1 in r 1 out r 1 in t 2 out t 2 in t 3 in t 3 out t 1 out r 2 in r 3 in r 2 out r 3 out uart or serial c txd rts dtr rxd cts dsr dcd ri 19 17 10 12 t 4 out t 4 in t 5 in t 5 out 16 v l
7 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mv. this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k ? pulldown resistor to ground will commit the output of the receiver to a high state. charge pump the charge pump is a sipex?atented design (u.s. #5,306,954) and uses a unique approach compared to older less?fficient designs. the charge pump uses a four?hase voltage shifting technique to attain symmetrical 5.5v power supplies. the internal power supply con- sists of a regulated dual charge pump that provides output voltages 5.5v regardless of the input voltage (v cc ) over the +3.3v to +5.5v range. this is important to maintain compliant rs-232 levels regardless of power supply fluctuations. the charge pump will provide out- put voltage levels of 4.0v when the input voltage (v cc ) is from +3.1v to +2.35v. the charge pump operates in a discontinuous mode using an internal oscillator. if the output voltages are less than a magnitude of 5.5v ( v cc > 3.3v ) and 4.0v (v cc < 3.1v), the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v (v cc > 3.3v) and 4.0v (v cc < 3.1v), the charge pump is disabled. this oscilla- tor controls the four phases of the voltage shifting (figure 10). a description of each phase follows. phase 1 (figure 11) figure 6. loopback test circuit for rs-232 driver data transmission rates figure 10. charge pump waveforms ch1 2.00v ch2 2.00v m 1.00 s ch1 1.96v 2 1 t t [] t 2 +6v a) c 2+ b) c 2 - -6v 0v 0v figure 7. loopback test circuit result at 120kbps (all drivers fully loaded) figure 8. loopback test circuit result at 250kbps (all drivers fully loaded) sp3282eb txin txout c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f logic inputs v cc 5k ? rxin rxout logic outputs shutdown gnd v cc online 1000pf
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 8 ?v ss charge storage ?during this phase of the clock cycle, the positive side of capacitors c 1 and c 2 are initially charged to v cc . c l + is then switched to gnd and the charge in c 1 is transferred to c 2 . since c 2 + is connected to v cc , the voltage poten- tial across capacitor c 2 is now 2 times v cc . phase 2 (figure 12) ?v ss transfer ?phase two of the clock connects the negative terminal of c 2 to the v ss storage capacitor and the positive terminal of c 2 to gnd. this transfers a negative generated voltage to c 3 . this generated voltage is regulated to a minimum voltage of -5.5v (v cc > 3.3v) and -4.0v (v cc < 3.1v). simultaneous with the transfer of the voltage to c 3 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd. phase 3 (figure 13) ?v dd charge storage ?the third phase of the clock is identical to the first phase ?the charge transferred in c 1 produces ? cc in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the voltage potential across c 2 is 2 times v cc . phase 4 (figure 14) ?v dd transfer ?the fourth phase of the clock connects the negative terminal of c 2 to gnd, and transfers this positive generated voltage across c 2 to c 4 , the v dd storage capacitor. this voltage is regulated to +5.5v (v cc > 3.3v) and +4.0v (v cc <3.1v). at this voltage, the internal oscillator is disabled. simultaneous with the transfer of the voltage to c 4 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd, allowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for theinternal oscillator are present. since both v + and v are separately generated charge pump capacitor selection the charge pump capacitors c1-c4 and bypass c5 can be of any type including ceramic. if polarized capacitors are used, refer to figure 3 application diagram for proper orientation. the following chart illustrates the minimum capaci- tor valve for a given input voltage range. from v cc , in a no?oad condition v + and v will be symmetrical. older charge pump approaches that generate v from v + will show a decrease in the magnitude of v compared to v + due to the inherent inefficiencies in the design. the clock rate for the charge pump typically operates at 500khz. the external capacitors should be 0.22 f with a 16v working voltage rating for a v cc input range of +2.35v to +5.5v. figure 11. charge pump ?phase 1 v cc v dd storage capacitor v ss storage capacitor c 1 c 2 +- -+ c 4 c 3 + - + - -v cc -v cc +v cc v cc (v) c1 and c5 ( f) c2,c3,c4 ( f) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 2.35 to 5.5 0.22 0.22
9 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation figure 12. charge pump ?phase 2 figure 13. charge pump ?phase 3 figure 14. charge pump ?phase 4 -5.5v or -4.0v v cc v dd storage capacitor v ss storage capacitor c 1 c 2 +- -+ c 4 c 3 + - + - v cc v dd storage capacitor v ss storage capacitor c 1 c 2 +- -+ c 4 c 3 + - + - -v cc -v cc +v cc +5.5v or +4.0v v cc v dd storage capacitor v ss storage capacitor c 1 c 2 +- -+ c 4 c 3 + - + - figure 15. stage i of auto on-line circuitry rs-232 receiver block r x inact inactive detection block r x in r x out figure 17. auto on-line timing waveforms receiver rs-232 input voltages status +5v 0v -5v t stsl t stsh t online v cc 0v driver rs-232 output voltages 0v +2.7v -2.7v s h u t d o w n
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 10 auto on-line circuitry the sp3282eb device has a patent pending auto on-line circuitry on board that saves power in applications such as laptop computers, palmtop (pda) computers, and other portable systems. the sp3282eb device incorporates an auto on-line circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. conversely, the auto on-line circuit also disables most of the internal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1 a. this function is controlled by the online pin. when this pin is tied to a logic low, the auto on-line func- tion is active. once active, the device is enabled until there is no activity on the receiver inputs. the table 3. auto on-line logic n w o d t u h s t u p n i e n i l n o t u p n i t a l a n g i s 2 3 2 - s r t u p n i r e v i e c e r s u t a t s t u p t u o t x t u or x t u o r e v i e c s n a r t s u t a t s h g i h- s e yh g i he v i t c ae v i t c a l a m r o n n o i t a r e p o h g i hh g i ho nw o le v i t c ae v i t c a l a m r o n n o i t a r e p o h g i hw o lo nw o lz - h g i he v i t c a e n i l - n o o t u a e d o m w o l- s e yh g i hz - h g i hz - h g i hn w o d t u h s w o l- o nw o lz - h g i hz - h g i hn w o d t u h s figure 16. stage ii of auto on-line circuitry status delay stage delay stage delay stage r 1 inact r 2 inact r 3 inact receiver input typically sees at least +3v, which are generated from the transmitters at the other end of the cable with a +5v minimum. when the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5k ? resistors to ground. when this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standby mode. when online is high, the auto on-line mode is disabled. the auto on-line circuit has two stages: 1) inactive detection 2) accumulated delay the first stage, shown in figure 15, detects an inactive input. a logic high is asserted on r x inact if the cable is disconnected or the
11 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation external transmitters are disabled. otherwise, r x inact will be at a logic low. this circuit is duplicated for each of the other receivers. the second stage of the auto on-line cir- cuitry, shown in figure 16, processes all the receiver's r x inact signals with an accumulated delay that disables the device to a 1 a supply current. the status pin goes to a logic low when the cable is disconnected, or when the exter- nal transmitters are disabled. when the drivers or internal charge pump are disabled, the supply current is reduced to 1 a. this can commonly occur in hand-held or portable applications where the rs-232 cable is disconnected or the rs-232 drivers of the connected peripheral are turned off. the auto on-line mode can be disabled by the shutdown pin. if this pin is a logic low, the auto on-line function will not operate regardless of the logic state of the online pin. table 3 summarizes the logic of the auto on- line operating modes and the truth table logic of the driver and receiver outputs. when the sp3282eb device is shut down, the charge pump is turned off. v+ charge pump output decays to v cc , the v- output decays to gnd. the decay time will depend on the size of capacitors used for the charge pump. once in shutdown, the time required to exit the shut down state and have valid v+ and v- levels is typically 200 s. for easy programming, the status pin can be used to indicate dtr or a ring indicator signal. tying online and shutdown together will bypass the auto on-line circuitry so this connection acts like a shutdown input pin. esd tolerance the sp3282eb device incorporates ruggedized esd cells on all driver output and receiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. the improved esd tol- erance is at least +15kv without damage nor latch- up. there are different methods of esd testing ap- plied: a) mil-std-883, method 3015.7 b) iec1000-4-2 air-discharge c) iec1000-4-2 direct contact the human body model has been the generally accepted esd testing method for semiconductors. this method is also specified in mil-std-883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human body? potential to store electro-static energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure 18. this method will test the ic? capability to withstand an esd transient during normal handling such as in manufacturing areas where the ics tend to be handled frequently. the iec-1000-4-2, formerly iec801-2, is generally used for testing esd on equipment and systems. for system manufacturers, they must guarantee a certain amount of esd protection since the system itself is exposed to the outside environment and human presence. the premise with iec1000-4-2 is that the system is required to withstand an amount of static electricity when esd is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. the transceiver ic receives most of the esd current when the esd source is applied to the connector pins. the test circuit for iec1000- 4-2 is shown on figure 19. there are two methods within iec1000-4-2, the air discharge method and the contact discharge method. with the air discharge method, an esd voltage is applied to the equipment under test (eut) through air. this simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. the high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. this energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. variables with an air discharge such as approach speed of the object carrying the esd potential to the system and humidity will tend to change the discharge current. for example, the rise time of the discharge current varies with the approach speed. the contact discharge method applies the esd current directly to the eut. this method was
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 12 the circuit model in figures 18 and 19 represent the typical esd testing circuit used for all three methods. the c s is initially charged with the dc power supply when the first switch (sw1) is on. now that the capacitor is charged, the second switch (sw2) is on while sw1 switches off. the voltage stored in the capacitor is then applied through r s , the current limiting resistor, onto the device under test (dut). in esd tests, the sw2 switch is pulsed so that the device under test receives a duration of voltage. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k ? an 100pf, respectively. for iec-1000-4-2, the current limiting resistor (r s ) and the source capacitor (c s ) are 330 ? an 150pf, respectively. figure 18. esd test circuit for human body model r c c s r s sw1 sw2 r c device under t est dc power source c s r s sw1 sw2 figure 20. esd test waveform for iec1000-4-2 i ? figure 19. esd test circuit for iec1000-4-2 r s and r v add up to 330 add up to 330 ? f or iec1000-4-2. r s and r v add up to 330 ? for iec1000-4-2. contact-discharge module r v r c c s r s sw1 sw2 r c device under t est dc power source c s r s sw1 sw2 r v contact-discharge module devised to reduce the unpredictability of the esd arc. the discharge current rise time is constant since the energy is directly transferred without the air-gap arc. in situations such as hand held systems, the esd charge can be directly discharged to the equipment from a person already holding the equipment. the current is transferred on to the keypad or the serial port of the equipment directly and then travels through the pcb and finally to the ic. the higher c s value and lower r s value in the iec1000-4-2 model are more stringent than the human body model. the larger storage capacitor injects a higher voltage to the test point when sw2 is switched on. the lower current limiting resistor increases the current charge onto the test point. t=0ns t=30ns 0a 15a 30a t ?
13 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation device pin human body iec1000-4-2 tested model air discharge direct contact level driver outputs 15kv 15kv 8kv 4 receiver inputs 15kv 15kv 8kv 4 table 4. transceiver esd tolerance levels package: 28 pin tssop seating plane a2 a a1 b see detail ? b b seaing plane l1 l 1 detail a 2 3 c b section b-b e1 e d index area d 2 x 2 e1 12 e symbol min nom max a-- 1.2 a1 0.05 - 0.15 a2 0.8 1 1.05 b 0.19 - 0.3 c 0.09 - 0.2 d 9.6 9.7 9.8 e e e1 4.3 4.4 4.5 l 0.45 0.6 0.75 l1 ?1 0o - 8o ?2 ?3 note: dimensions in (mm) 12o ref 12o ref 28 pin tssop jedec mo-153 (ae) variation 6.40 bsc 1.00 ref 0.65 bsc
date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation 14 package: 28 pin ssop b c with lead finish base metal seating plane a2 a a1 see detail ? l1 l seaing plane 2 nx r r1 a a detail a gauge plane section a-a d index area d 2 x 2 e1 n 1 2 e1 e b symbol min nom max a--2 a1 0.05 - - a2 1.65 1.75 1.85 b 0.22 - 0.38 c 0.09 - 0.25 d 9.9 10.2 10.5 e 7.4 7.8 8.2 e1 5 5.3 5.6 l 0.55 0.75 0.95 l1 ?0o4 o8o note: dimensions in (mm) 28 pin ssop jedec mo-150 (ah) variation 1.25 ref
15 date: 02/24/05 sp3282eb intelligent +2.35v to +5.5v rs-232 transceivers ?copyright 2005 sipex corporation model temperature range package types sp3282ebca ................................................. 0 c to +70 c ..................................................... 28-pin ssop sp3282ebca/tr ............................................ 0 c to +70 c ..................................................... 28-pin ssop sp3282ebcy .................................................. 0 c to +70 c ................................................... 28-pin tssop sp3282ebcy/tr ............................................ 0 c to +70 c ................................................... 28-pin tssop sp3282ebea ................................................. 40 c to +85 c .................................................... 28-pin ssop sp3282ebea/tr ........................................... 40 c to +85 c .................................................... 28-pin ssop sp3282ebey ................................................. 40 c to +85 c .................................................. 28-pin tssop sp3282ebey/tr ........................................... 40 c to +85 c .................................................. 28-pin tssop ordering information corporation analog excellence sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor t he rights of others. sipex corporation headquarters and sales office 233 south hillview drive milpitas, ca 95035 tel: (408) 934-7500 fax: (408) 935-7600 /tr = tape and reel pack quantity is 1,500 for ssop or tssop. available in lead free packaging. to order add "-l" suffix to part number. example: sp3282ebeytr = standard; sp3282ebey-l/tr = lead free click here to order samples

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